EEE120 8-BIT STUDY HUB_

Course Overview

Welcome to your EEE120 command center. This guide covers the core concepts from the first modules to help you build, debug, and design digital logic.

Course Modules

• Mod 1: Electrical Circuit Fundamentals, Logic Gates, Truth Tables, CLI
• Mod 2: Number Systems, Addition & Subtraction, 2's Complement
• Mod 3: Boolean Algebra, Logic Minimization, Karnaugh Maps
• Mod 4: Advanced Combinational Logic (Multiplexers, Decoders)
• Mod 5: Sequential Logic (Latches, Flip Flops, Registers)
• Mod 6: Synchronous Finite State Machine (FSM) Design
• Mod 7: Microprocessor Design
• Mod 8: Final Exam Review

Lab Experiments

The labs guide you through building a 4-bit CPU in the 'Digital' simulator.

• Lab 0: Simulator Tutorial
• Lab 1: Half Adder, Incrementer, 4-Bit Full Adder
• Lab 2: Multiplexer, Decoder, ALU, 7-Segment Display
• Lab 3: The Brainless Microprocessor
• Lab 4: The Complete Microprocessor
• Capstone: Design your own FSM.

Module 1: Command Line Interface (CLI)

This section covers the essential commands for Bash (Mac/Linux) and PowerShell (Windows).

Module 1: Digital Logic Gates

Digital logic is described by truth tables, Boolean equations, and gate symbols.

 A | B | Y
---|---|---
 0 | 0 | 0
 0 | 1 | 0
 1 | 0 | 0
 1 | 1 | 1

 A | B | Y
---|---|---
 0 | 0 | 0
 0 | 1 | 1
 1 | 0 | 1
 1 | 1 | 1

 A | Y
---|---
 0 | 1
 1 | 0

 A | B | Y
---|---|---
 0 | 0 | 0
 0 | 1 | 1
 1 | 0 | 1
 1 | 1 | 0

 A | B | Y
---|---|---
 0 | 0 | 1
 0 | 1 | 1
 1 | 0 | 1
 1 | 1 | 0

 A | B | Y
---|---|---
 0 | 0 | 1
 0 | 1 | 0
 1 | 0 | 0
 1 | 1 | 0

 A | B | Y
---|---|---
 0 | 0 | 1
 0 | 1 | 0
 1 | 0 | 0
 1 | 1 | 1

Key Logic Concepts (from Quiz 1)

• Truth Table Size: A circuit with N inputs has $2^N$ possible combinations (rows) in its truth table. (e.g., 4 inputs -> $2^4 = 16$ rows).
• Universal Gates: All logic circuits can be created using only NAND gates, or only NOR gates.
• De Morgan's Law:
  • (A · B)' = A' + B' (A NAND is an OR with inverted inputs)
  • (A + B)' = A' · B' (A NOR is an AND with inverted inputs)
• !!! CRITICAL RULE !!! You should NEVER tie two outputs of two distinct circuits together. This can cause a short circuit.

Module 2: Number Systems

Computers use binary (Base-2), but humans often use decimal (Base-10), octal (Base-8), or hexadecimal (Base-16) for convenience.

Number Base Chart

Conversions

Decimal to Binary (e.g., 88)

Find the largest power of 2 that fits and subtract. Repeat.

88
- 64 (2^6) -> 1
Remaining: 24
- 32 (2^5) -> 0
- 16 (2^4) -> 1
Remaining: 8
-  8 (2^3) -> 1
Remaining: 0
-  4 (2^2) -> 0
-  2 (2^1) -> 0
-  1 (2^0) -> 0

Result: 1011000. As 8-bit: 01011000

Binary to Hexadecimal (e.g., 10101011)

Group bits into sets of 4 (nibbles) from right to left.

Binary: 1010 1011
Group 1: 1010 = 8 + 2 = 10 = A (Hex)
Group 2: 1011 = 8 + 2 + 1 = 11 = B (Hex)

Result: AB

Decimal to Hexadecimal (e.g., 1302)

Repeatedly divide by 16 and read the remainders from bottom up.

1302 / 16 = 81 remainder 6
  81 / 16 =  5 remainder 1
   5 / 16 =  0 remainder 5

Read remainders up: 516
Result: 516

Signed Binary: Two's Complement

This is the standard way to represent negative numbers in binary.

To find a negative number (e.g., -22 in 6 bits):

1. Get positive binary: 22 = 16 + 4 + 2 = 10110
2. Pad to N bits: (6 bits) -> 010110
3. Invert all bits (One's Complement): 101001
4. Add 1: 101001 + 1 = 101010

-22 (decimal) = 101010 (6-bit signed)

Range & Overflow

Number Ranges (N bits)

• Unsigned: 0 to ($2^N - 1$)
  • e.g., 8-bit: 0 to 255
• Signed: $-(2^{N-1})$ to $+ (2^{N-1} - 1)$
  • e.g., 6-bit: $-(2^5)$ to $+(2^5 - 1)$ = -32 to +31

Signed Overflow

An overflow occurs when the result of an addition is too large (or too small) to fit in the given bits. It can only happen when adding two numbers of the *same sign*.

Rule: Overflow occurs if the carry **into** the Most Significant Bit (MSB) is NOT EQUAL to the carry **out of** the MSB.

C_in (to MSB) ≠ C_out (from MSB)  => OVERFLOW!

Example (Q10): 110100 + 110100

  ¹ ¹   (Carries)
  110100  (-12)
+ 110100  (-12)
----------
  101000  (-24)
  
C_in to MSB = 1
C_out of MSB = 1
Since C_in == C_out, there is NO overflow.

Module 2: Adders & Circuits

These are the circuits that perform binary addition.

Half Adder

Adds two 1-bit numbers (A and B). It has two outputs: Sum and Carry.

• Sum (S) = A ⊕ B (XOR)
• Carry (C) = A · B (AND)

This is the circuit from Quiz Q18, Option A.

Full Adder

Adds three 1-bit numbers (A, B, and a Carry In, $C_{in}$). This allows adders to be "cascaded" or "chained" together.

• Sum (S) = A ⊕ B ⊕ $C_{in}$
• Carry (C) = (A · B) + ($C_{in}$ · (A ⊕ B))

Multi-bit Adders

• 4-bit Incrementer: A circuit that adds 1 to a 4-bit number (a+1).
• 4-bit Full Adder: A circuit that adds two 4-bit numbers (A and B) and one $C_{in}$. This is built by chaining 4 Full Adders together. The $C_{out}$ of one bit becomes the $C_{in}$ of the next.

Lab FAQs & Troubleshooting

Common issues and solutions from the EEE120 Lab FAQ.