EEE120: LEVEL 1 - DIGITAL LOGIC

ASU COURSE ASSISTANT SYSTEM ONLINE_

MISSION OVERVIEW

Welcome, Player! Your objective is to master the fundamentals of digital design. We will ACE this class together.

OBJECTIVES:

Analyze, design, construct, and debug digital combinational logic circuitry.
Analyze, design, construct, and debug digital finite state machine circuitry.

CORE SKILLS TO UNLOCK:

Logic Gates: Construct circuits for AND, OR, NOT, XOR operations.
Truth Tables: Describe circuit functions using I/O tables.
Boolean Algebra: Perform math with binary logic circuits.
Karnaugh Maps: Graphically simplify equations for efficiency.
Number Systems: Master binary and other non-decimal systems.
Programmable Logic: Realize circuits using programmable elements.
Memory: Store logic states in latches and flip-flops.
Finite State Machines (FSM): Combine memory & logic for complex functions.
Microprocessors: Understand the inner workings of a CPU.

COURSE MODULES (LEVELS)

This course is divided into 8 modules. Complete them all to win!

MODULE 1: FUNDAMENTALS & LOGIC GATES

Analog vs. Digital: Analog is continuous; Digital is discrete (0s and 1s). We focus on Digital.

Binary Digits (Bits): The fundamental unit of information. Logic 0 (Low, False, ~0V) and Logic 1 (High, True, ~5V).

BASIC LOGIC GATES

GATE	SYMBOL	BOOLEAN EQ	TRUTH TABLE (2-Input)
AND	D-SHAPE	Y = A * B	00=0, 01=0, 10=0, 11=1
OR	CURVED	Y = A + B	0+0=0, 0+1=1, 1+0=1, 1+1=1
NOT	TRIANGLE	Y = A'	0'=1, 1'=0
NAND	AND+BUBBLE	Y = (A * B)'	00'=1, 01'=1, 10'=1, 11'=0
NOR	OR+BUBBLE	Y = (A + B)'	0+0'=1, 0+1'=0, 1+0'=0, 1+1'=0
XOR	CURVED+LINE	Y = A ⊕ B	0⊕0=0, 0⊕1=1, 1⊕0=1, 1⊕1=0

MODULE 2: NUMBER SYSTEMS & ARITHMETIC

Decimal (Base-10): 0-9. Our everyday system.
Binary (Base-2): 0, 1. The language of computers.
Hexadecimal (Base-16): 0-9, A-F. Compact representation of binary.

Binary Arithmetic

Addition: 0+0=0, 0+1=1, 1+0=1, 1+1=10 (0 carry 1).

2's Complement: Used for representing signed numbers. To find 2's complement: Invert all bits and add 1.

Example: +5 is `0101`. -5 is `1010` (invert) + `1` = `1011`.

MODULE 3: BOOLEAN ALGEBRA & K-MAPS

Use Boolean theorems to simplify logic expressions, reducing gate count.

Karnaugh Maps (K-Maps)

A graphical method to simplify Boolean equations. Group adjacent 1s in powers of 2 (1, 2, 4, 8...).

Forms:

Sum of Products (SOP): Group 1s. Result is ORed product terms (e.g., Y = AB + C'D).
Product of Sums (POS): Group 0s. Result is ANDed sum terms (e.g., Y = (A+B)(C'+D')).

MODULE 4: COMBINATIONAL LOGIC

Logic circuits where the output depends only on current inputs.

Decoder: Converts binary code to a single active output (e.g., 2-to-4 decoder).
Encoder: Converts a single active input to a binary code (reverse of decoder).
Multiplexer (MUX): A "data selector". Selects one of many inputs to the output based on select lines.
Demultiplexer (DeMUX): A "data distributor". Takes one input and routes it to one of many outputs.

MODULE 5: SEQUENTIAL LOGIC

Logic circuits with memory. Output depends on current inputs AND past outputs (state).

Latch: Basic memory element, level-sensitive (e.g., SR Latch, D Latch).
Flip-Flop: Edge-triggered memory element. Changes state on clock edge (e.g., D-FF, JK-FF, T-FF).
Register: A group of flip-flops used to store multi-bit data.
Counter: A register that cycles through a sequence of states (e.g., binary counter).

MODULE 6: FINITE STATE MACHINES (FSM)

A model of computation consisting of a set of states, a start state, and transitions between states based on inputs.

Moore Machine: Outputs depend ONLY on the current state.
Mealy Machine: Outputs depend on the current state AND current inputs.

Design Process: State Diagram -> State Table -> State Assignment -> K-Maps -> Circuit Implementation.

MODULE 7 & 8: MICROPROCESSOR & REVIEW

M7: Design a basic microprocessor (CPU) by combining an ALU, registers, and a control unit (FSM).

M8: Final Exam Review.

LABORATORY MISSIONS

Your goal is to build and simulate a 4-bit CPU using the "Digital" software.

RULES: Individual reports required. No copying. Submit zip of design + PDF report on Canvas.

MISSION LIST:

Lab 0: Simulator Tutorial. Learn the tools.
Lab 1: Adders. Build Half Adder, Full Adder, and 4-bit Adder.
Lab 2: MUX, ALU, Display. Build a Multiplexer, Arithmetic Logic Unit, and 7-Segment decoder.
Lab 3: The Brainless Microprocessor. Combine ALU and registers.
Lab 4: The Complete Microprocessor. Add control logic and memory to execute instructions.
Capstone Project: Design your own FSM based on requirements.

LAB EXAMPLE: ALU (From Lab 2/3)

An ALU (Arithmetic Logic Unit) performs math and logic operations. A MUX is used to select the operation result.

[IMAGE: BLOCK DIAGRAM OF AN ALU WITH A MUX SELECTING OUTPUTS]

Inputs A, B -> [AND, OR, ADDER, SUBTRACTOR] -> MUX -> Output Y

LAB EXAMPLE: COMPLETE CPU (From Lab 4)

The final CPU combines the ALU, Register File, Program Counter, Instruction Memory, and a Control Unit (FSM) to fetch, decode, and execute instructions.

CIRCUIT ANALYSIS EXAMPLE

Let's analyze a circuit to find its output waveform.

Problem:

Circuit: X = A + B (OR gate), then Z = C ⊕ X (XOR gate). Final: Z = C ⊕ (A + B).

Step-by-Step Solution:

TIME INTERVAL	INPUT A	INPUT B	INPUT C	X = A + B	Z = C ⊕ X
1	1	0	0	1	1 (0⊕1)
2	0	0	0	0	0 (0⊕0)
3	0	1	1	1	0 (1⊕1)
4	1	1	1	1	0 (1⊕1)
5	1	0	0	1	1 (0⊕1)
6	0	0	0	0	0 (0⊕0)

Final Output Waveform Z: 1, 0, 0, 0, 1, 0

FREQUENTLY ASKED QUESTIONS

Q: Is this course hard?
A: It requires consistent effort. Don't fall behind! The concepts build on each other.
Q: Do I need to know programming?
A: No prior knowledge is assumed, but it helps for later modules (microprocessors).
Q: What software do we use for labs?
A: You will use a digital logic simulation software called "Digital".
Q: Are labs individual or group work?
A: All labs and the Capstone Project are INDIVIDUAL assignments. You can discuss concepts, but your submission must be your own work.
Q: What's the most important concept?
A: Boolean algebra and understanding how state machines work are crucial.