1. The Ecosystem: How Files Connect
In this lab, you moved between visual design (Digital) and hardware description code (Verilog). Understanding how these files talk to each other is crucial.
.dig File
(Visual Schematic)
➡
microprocessor.v
(Hardware Code)
+
micro_stim.v
(The Test Bench)
rom_vals.hex
(The Dictionary)
↘
iverilog / vvp
(The Compiler)
↙
ram_vals.txt
(The Script/Program)
Key Takeaways:
- Digital is the Generator: When you click "Export," Digital overwrites
microprocessor.v. Any manual hacks in the code are lost unless you update the .dig file.
- Hardcoded vs. Dynamic: ROM values are baked into the chip (hardcoded in .v). RAM values are read dynamically at startup ($readmemh).
2. Component Glossary
The microprocessor is built of three main subsystems. Here is what every part does.
The Address Generator (The Navigator)
PC (Program Counter)
Holds the address of the next instruction. It usually counts up by 1 (0, 1, 2...) to step through your program sequentially.
MAR (Memory Address Register)
Holds a specific address we want to look at. Unlike the PC (which just counts), the MAR can hold any random address (e.g., 9) to save or retrieve data.
Mux (Multiplexer)
The "Traffic Cop." It decides which address goes to Memory: the PC (for instructions) or the MAR (for data).
The Controller (The Brain)
IR (Instruction Register)
Holds the current command (Opcode) being executed (e.g., "STORE" or "ADD"). It tells the ROM what row to look at.
Step Register
Counts the micro-steps inside a single instruction. (e.g., Step 0: Fetch, Step 1: Execute).
ROM (Read-Only Memory)
The "Lookup Table." It takes the Instruction + Step and outputs a 14-bit binary code that controls every wire in the machine.
The Datapath / Brainless CPU (The Muscle)
ALU (Arithmetic Logic Unit)
The calculator. It performs math (ADD, SUB) and logic (AND) on the data.
Accumulator
The "Short-term Memory." It holds the result of the last calculation.
RAM (Random Access Memory)
The "Long-term Memory." It stores your program instructions AND your data variables.
3. Key Logic Concepts
Microcode (The "Puppet Strings")
You learned that a single assembly instruction (like STORE) is actually a sequence of smaller hardware events.
- Fetch (Step 0): The CPU reads RAM to find out what to do.
- Execute (Step 1+): The ROM turns on specific wires (like
load_mar or arith) to move data around.
Control Signals
The 14-bit HEX codes (e.g., 0098) you wrote are just compressed switches:
arith=1: Tell ALU to add.load_acc=1: Open the door to the Accumulator.write=1: Tell RAM to save the data on the bus.
4. Debugging Lessons Learned
The real learning happened when things broke. Here is what you solved:
Problem: The Infinite Loop
Symptom: The write signal never turned on. The simulation stalled.
Cause: The ROM code for STORE (Step 1) told the controller to go to "Step 1" next. This created a circle.
Solution: Changing the hex from 1304 to 2304 changed the "Next Step" bits to 2, allowing the program to advance.
Problem: Red Waveforms
Symptom: Red lines in GTKWave.
Cause: The hardware expected 16 lines of RAM, but the text file only had 12. The simulator filled the gap with "Undefined" (X).
Solution: Padding the text file with zeros matched the hardware expectation.
Problem: The "Safe" Zero
Lesson: Originally, ZERO was done by subtraction. This was risky because it relied on external inputs. We changed it to 0010 which performs an AND with 0. This is a robust engineering choice: ensure the result is 0 regardless of external noise.