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Systems Architecture Master Guide

Systems Architecture Master Guide

SYSTEMSMASTER

Core Modules

Compilation

Performance

Data Rep

Assembly

Pipelining

I/O Peripherals

PRO TIP

Smaller transistors decrease prop delay, which directly increases performance.

Comprehensive Review

Computer Architecture

High-density summary of system execution, architectural performance, and hardware-level data management.

Compilation Process

Lexical Analysis
Tokens

The very first step: separating input source code text into discrete, recognizable atomic tokens.

Assembler
Machine Code

Translates assembly language into final binary machine code the CPU can execute.

Linker
Linking

Combines multiple partial programs and external libraries into a single executable file.

Backend
Optimization

Arranges symbol tables in memory and generates the final hardware instructions.

Performance & Metrics

Master Formula

CPU Time = IC × CPI × T

Where IC = Instruction Count, CPI = Cycles Per Instruction, T = Clock Period

Improvement Strategies

Decrease CPI (Better architecture)

Increase Clock Rate (Better manufacturing)

Decrease Logic Depth

Performance Rules

Performance = 1 / Execution Time

Propagation Delay limits Clock Rate

Feature Size ↓ = Performance ↑

Register Conventions

Register

Convention / Purpose

Save Responsibility

$ra

Return Address (Automatic via jal)

Caller (if nested)

$sp

Stack Pointer (Points to top of stack)

Always maintained

$v0 - $v1

Return Values from procedure

Callee Result

$a0 - $a3

Arguments / Parameters

Caller Prepared

$s0 - $s7

Saved Temporaries (Stable across calls)

Callee Save

$t0 - $t9

Volatile Temporaries

Caller Save

Data Representation

Number Systems

Binary & Hex

Modern computers use 2 symbols (0, 1) where '1' is high voltage. Hexadecimal uses 16 symbols for compact memory addresses.

Sign Logic

2's Complement

MSB = 0 indicates Positive. To convert: Flip bits and add 1. Example: -9 (8-bit) = 11110111.

Byte Order

Endianness

Big-Endian stores MSB at lowest address. Endianness matters when transferring memory blocks between different CPUs.

Exceptions

Overflow States

Unsigned Short (65535) + 1 = Overflow. Signed Int (-2.1B) - 1 = Underflow. Signed Short (0) + 1 = OK.

Pipelining & Hazards

Structural Hazard

Hardware resource conflict (two instructions using memory at once).…

Systems Architecture Master Guide

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                <h2 class="text-sky-400 font-black text-2xl tracking-tighter">SYSTEMS<br>MASTER</h2>
                <div class="h-1 w-12 bg-sky-500 mt-2 rounded"></div>
            </div>
            
            <div class="space-y-1">
                <p class="text-[10px] font-bold text-slate-500 uppercase tracking-widest mb-4">Core Modules</p>
                <a href="#compilation" class="sidebar-link flex items-center p-3 rounded text-slate-400 hover:text-white">
                    <i class="fas fa-microchip w-6"></i> Compilation
                </a>
                <a href="#performance" class="sidebar-link flex items-center p-3 rounded text-slate-400 hover:text-white">
                    <i class="fas fa-tachometer-alt w-6"></i> Performance
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                    <i class="fas fa-binary w-6"></i> Data Rep
                </a>
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                    <i class="fas fa-terminal w-6"></i> Assembly
                </a>
                <a href="#pipelining" class="sidebar-link flex items-center p-3 rounded text-slate-400 hover:text-white">
                    <i class="fas fa-stream w-6"></i> Pipelining
                </a>
                <a href="#io" class="sidebar-link flex items-center p-3 rounded text-slate-400 hover:text-white">
                    <i class="fas fa-keyboard w-6"></i> I/O Peripherals
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            <div class="mt-12 pt-8 border-t border-slate-900">
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                    <p class="text-xs text-sky-400 font-bold mb-1">PRO TIP</p>
                    <p class="text-[10px] text-slate-400">Smaller transistors decrease prop delay, which directly increases performance.</p>
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                        <span class="h-px w-8 bg-sky-500"></span>
                        <span class="text-xs font-bold text-sky-500 uppercase tracking-[0.3em]">Comprehensive Review</span>
                    </div>
                    <h1 class="text-5xl font-extrabold text-white tracking-tight">Computer Architecture</h1>
                    <p class="text-slate-400 text-lg mt-4 max-w-2xl">High-density summary of system execution, architectural performance, and hardware-level data management.</p>
                </header>

                <!-- 1. Compilation & Execution -->
                <section id="compilation" class="scroll-mt-12">
                    <h2 class="text-2xl font-bold text-sky-400 flex items-center mb-8">
                        <span class="bg-sky-500/10 p-2 rounded-lg mr-4"><i class="fas fa-layer-group text-sky-500"></i></span>
                        Compilation Process
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                            <span class="tag text-blue-400 bg-blue-400/10">Lexical Analysis</span>
                            <h4 class="text-white font-bold mt-4 mb-2">Tokens</h4>
                            <p class="text-xs text-slate-400 leading-relaxed">The very first step: separating input source code text into discrete, recognizable atomic tokens.</p>
                        </div>
                        <div class="glass-card p-6">
                            <span class="tag text-purple-400 bg-purple-400/10">Assembler</span>
                            <h4 class="text-white font-bold mt-4 mb-2">Machine Code</h4>
                            <p class="text-xs text-slate-400 leading-relaxed">Translates assembly language into final binary machine code the CPU can execute.</p>
                        </div>
                        <div class="glass-card p-6">
                            <span class="tag text-emerald-400 bg-emerald-400/10">Linker</span>
                            <h4 class="text-white font-bold mt-4 mb-2">Linking</h4>
                            <p class="text-xs text-slate-400 leading-relaxed">Combines multiple partial programs and external libraries into a single executable file.</p>
                        </div>
                        <div class="glass-card p-6">
                            <span class="tag text-orange-400 bg-orange-400/10">Backend</span>
                            <h4 class="text-white font-bold mt-4 mb-2">Optimization</h4>
                            <p class="text-xs text-slate-400 leading-relaxed">Arranges symbol tables in memory and generates the final hardware instructions.</p>
                        </div>
                    </div>
                </section>

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                <section id="performance" class="scroll-mt-12">
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                        Performance & Metrics
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                            <h3 class="text-sm font-black text-slate-500 uppercase tracking-widest mb-6 text-center">Master Formula</h3>
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                                <p class="text-emerald-400 font-mono text-center text-xl">CPU Time = IC &times; CPI &times; T</p>
                            </div>
                            <p class="text-[10px] text-center text-slate-500 mt-6 italic">Where IC = Instruction Count, CPI = Cycles Per Instruction, T = Clock Period</p>
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                            <div class="glass-card p-6">
                                <h4 class="text-white font-bold mb-3">Improvement Strategies</h4>
                                <ul class="space-y-2 text-xs text-slate-400">
                                    <li class="flex items-center"><i class="fas fa-check text-emerald-500 mr-2"></i> Decrease CPI (Better architecture)</li>
                                    <li class="flex items-center"><i class="fas fa-check text-emerald-500 mr-2"></i> Increase Clock Rate (Better manufacturing)</li>
                                    <li class="flex items-center"><i class="fas fa-check text-emerald-500 mr-2"></i> Decrease Logic Depth</li>
                                </ul>
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                            <div class="glass-card p-6">
                                <h4 class="text-white font-bold mb-3">Performance Rules</h4>
                                <ul class="space-y-2 text-xs text-slate-400">
                                    <li class="flex items-center"><i class="fas fa-info-circle text-sky-400 mr-2"></i> Performance = 1 / Execution Time</li>
                                    <li class="flex items-center"><i class="fas fa-info-circle text-sky-400 mr-2"></i> Propagation Delay limits Clock Rate</li>
                                    <li class="flex items-center"><i class="fas fa-info-circle text-sky-400 mr-2"></i> Feature Size &darr; = Performance &uarr;</li>
                                </ul>
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                        </div>
                    </div>
                </section>

                <!-- 3. Registers & Assembly -->
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                        Register Conventions
                    </h2>
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                            <thead class="bg-slate-900/50">
                                <tr>
                                    <th class="pl-8">Register</th>
                                    <th>Convention / Purpose</th>
                                    <th class="pr-8">Save Responsibility</th>
                                </tr>
                            </thead>
                            <tbody class="text-sm">
                                <tr>
                                    <td class="pl-8 font-mono font-bold text-indigo-400">$ra</td>
                                    <td>Return Address (Automatic via <code>jal</code>)</td>
                                    <td class="pr-8 text-xs text-slate-500">Caller (if nested)</td>
                                </tr>
                                <tr>
                                    <td class="pl-8 font-mono font-bold text-indigo-400">$sp</td>
                                    <td>Stack Pointer (Points to top of stack)</td>
                                    <td class="pr-8 text-xs text-slate-500">Always maintained</td>
                                </tr>
                                <tr>
                                    <td class="pl-8 font-mono font-bold text-indigo-400">$v0 - $v1</td>
                                    <td>Return Values from procedure</td>
                                    <td class="pr-8 text-xs text-slate-500">Callee Result</td>
                                </tr>
                                <tr>
                                    <td class="pl-8 font-mono font-bold text-indigo-400">$a0 - $a3</td>
                                    <td>Arguments / Parameters</td>
                                    <td class="pr-8 text-xs text-slate-500">Caller Prepared</td>
                                </tr>
                                <tr>
                                    <td class="pl-8 font-mono font-bold text-indigo-400">$s0 - $s7</td>
                                    <td>Saved Temporaries (Stable across calls)</td>
                                    <td class="pr-8 text-xs text-slate-500 italic">Callee Save</td>
                                </tr>
                                <tr>
                                    <td class="pl-8 font-mono font-bold text-indigo-400">$t0 - $t9</td>
                                    <td>Volatile Temporaries</td>
                                    <td class="pr-8 text-xs text-slate-500 italic border-b-0">Caller Save</td>
                                </tr>
                            </tbody>
                        </table>
                    </div>
                </section>

                <!-- 4. Data Representation -->
                <section id="data" class="scroll-mt-12">
                    <h2 class="text-2xl font-bold text-orange-400 flex items-center mb-8">
                        <span class="bg-orange-500/10 p-2 rounded-lg mr-4"><i class="fas fa-microscope text-orange-500"></i></span>
                        Data Representation
                    </h2>
                    <div class="grid grid-cols-1 md:grid-cols-2 lg:grid-cols-4 gap-6">
                        <div class="glass-card p-6 border-t-2 border-orange-500">
                            <h4 class="text-xs font-black text-slate-500 mb-4 uppercase tracking-widest">Number Systems</h4>
                            <p class="text-sm font-bold text-white mb-2">Binary & Hex</p>
                            <p class="text-[11px] text-slate-400">Modern computers use 2 symbols (0, 1) where '1' is high voltage. Hexadecimal uses 16 symbols for compact memory addresses.</p>
                        </div>
                        <div class="glass-card p-6 border-t-2 border-orange-500">
                            <h4 class="text-xs font-black text-slate-500 mb-4 uppercase tracking-widest">Sign Logic</h4>
                            <p class="text-sm font-bold text-white mb-2">2's Complement</p>
                            <p class="text-[11px] text-slate-400">MSB = 0 indicates Positive. <br>To convert: Flip bits and add 1. <br>Example: -9 (8-bit) = 11110111.</p>
                        </div>
                        <div class="glass-card p-6 border-t-2 border-orange-500">
                            <h4 class="text-xs font-black text-slate-500 mb-4 uppercase tracking-widest">Byte Order</h4>
                            <p class="text-sm font-bold text-white mb-2">Endianness</p>
                            <p class="text-[11px] text-slate-400">Big-Endian stores MSB at lowest address. Endianness matters when transferring memory blocks between different CPUs.</p>
                        </div>
                        <div class="glass-card p-6 border-t-2 border-orange-500">
                            <h4 class="text-xs font-black text-slate-500 mb-4 uppercase tracking-widest">Exceptions</h4>
                            <p class="text-sm font-bold text-white mb-2">Overflow States</p>
                            <p class="text-[11px] text-slate-400">Unsigned Short (65535) + 1 = Overflow. <br>Signed Int (-2.1B) - 1 = Underflow. <br>Signed Short (0) + 1 = OK.</p>
                        </div>
                    </div>
                </section>

                <!-- 5. Pipelining & Hazards -->
                <section id="pipelining" class="scroll-mt-12">
                    <h2 class="text-2xl font-bold text-rose-400 flex items-center mb-8">
                        <span class="bg-rose-500/10 p-2 rounded-lg mr-4"><i class="fas fa-project-diagram text-rose-500"></i></span>
                        Pipelining & Hazards
                    </h2>
                    <div class="grid grid-cols-1 md:grid-cols-3 gap-6">
                        <div class="glass-card p-6 border-l-4 border-rose-500 bg-rose-500/5">
                            <h3 class="font-bold text-white mb-4">Structural Hazard</h3>
                            <p class="text-xs text-slate-400">Hardware resource conflict (two instructions using memory at once). Fixed by doubling interfaces or memory banks.</p>
                        </div>
                        <div class="glass-card p-6 border-l-4 border-amber-500 bg-amber-500/5">
                            <h3 class="font-bold text-white mb-4">Data Hazard</h3>
                            <p class="text-xs text-slate-400">Result needed before it's written. Fixed with <strong>Forwarding</strong> (best) or <strong>Stalling</strong> (bubbles).</p>
                        </div>
                        <div class="glass-card p-6 border-l-4 border-indigo-500 bg-indigo-500/5">
                            <h3 class="font-bold text-white mb-4">Control Hazard</h3>
                            <p class="text-xs text-slate-400">Branches/Jumps change the PC. Fixed with <strong>Branch Prediction</strong> or <strong>Flushing</strong> instructions.</p>
                        </div>
                    </div>
                    
                    <div class="mt-8 p-6 bg-slate-900/50 rounded-xl border border-slate-800">
                        <h4 class="text-sm font-bold text-white mb-4">The Load-Use Constraint</h4>
                        <p class="text-xs text-slate-400 leading-relaxed">A <code>lw</code> instruction updates the register at the <strong>end</strong> of the pipeline. Since the data is only ready at the MEM stage, a following instruction that uses that data immediately <em>must</em> stall for 1 cycle, as forwarding cannot look into the future.</p>
                    </div>
                </section>

                <!-- 6. Peripherals -->
                <section id="io" class="scroll-mt-12 pb-20">
                    <h2 class="text-2xl font-bold text-yellow-400 flex items-center mb-8">
                        <span class="bg-yellow-500/10 p-2 rounded-lg mr-4"><i class="fas fa-hdd text-yellow-500"></i></span>
                        I/O Peripheral Mapping
                    </h2>
                    <div class="grid grid-cols-1 md:grid-cols-2 gap-8">
                        <div class="glass-card p-8">
                            <h3 class="text-lg font-bold text-white mb-6">Memory Address Map</h3>
                            <div class="space-y-4">
                                <div class="flex justify-between items-center p-3 bg-slate-950 rounded-lg">
                                    <span class="text-xs text-slate-400 uppercase tracking-widest">Switches</span>
                                    <span class="text-sm font-mono text-yellow-400">0xf0100000</span>
                                </div>
                                <div class="flex justify-between items-center p-3 bg-slate-950 rounded-lg">
                                    <span class="text-xs text-slate-400 uppercase tracking-widest">LED Array</span>
                                    <span class="text-sm font-mono text-yellow-400">0xf0200000</span>
                                </div>
                                <div class="flex justify-between items-center p-3 bg-slate-950 rounded-lg">
                                    <span class="text-xs text-slate-400 uppercase tracking-widest">UART Cmd</span>
                                    <span class="text-sm font-mono text-sky-400">0xf0000000</span>
                                </div>
                                <div class="flex justify-between items-center p-3 bg-slate-950 rounded-lg">
                                    <span class="text-xs text-slate-400 uppercase tracking-widest">UART Buffer</span>
                                    <span class="text-sm font-mono text-sky-400">0xf0000008</span>
                                </div>
                            </div>
                        </div>
                        <div class="glass-card p-8">
                            <h3 class="text-lg font-bold text-white mb-6">ASCII Reference</h3>
                            <div class="grid grid-cols-2 gap-4 text-xs font-mono">
                                <div class="p-3 bg-slate-950 rounded border border-slate-800">Space: <span class="text-emerald-400">0x20</span></div>
                                <div class="p-3 bg-slate-950 rounded border border-slate-800">Period: <span class="text-emerald-400">0x2E</span></div>
                                <div class="p-3 bg-slate-950 rounded border border-slate-800">'A': <span class="text-emerald-400">65</span></div>
                                <div class="p-3 bg-slate-950 rounded border border-slate-800">'a': <span class="text-emerald-400">97</span></div>
                            </div>
                            <div class="mt-8 p-4 bg-yellow-500/5 border border-yellow-500/20 rounded-lg">
                                <p class="text-[10px] text-yellow-400 font-bold uppercase mb-1">Example Logic</p>
                                <p class="text-xs text-slate-400">To turn on all 8 LEDs, write <span class="text-white font-mono">0xff</span> to the LED address. To turn on LEDs 0, 2, and 4, write <span class="text-white font-mono">0b10101</span>.</p>
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