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EEE120: Digital Design Fundamentals - 8-Bit Guide

EEE120: Digital Design Fundamentals - 8-Bit Guide









WELCOME TO

EEE120

DIGITAL DESIGN FUNDAMENTALS



INSERT COIN TO START






OVERVIEW

MODULES

LABS

EXAMPLES

FAQs





EEE120: LEVEL 1 - DIGITAL LOGIC

ASU COURSE ASSISTANT SYSTEM ONLINE_






MISSION OVERVIEW

Welcome, Player! Your objective is to master the fundamentals of digital design. We will ACE this class together.


OBJECTIVES:


Analyze, design, construct, and debug digital combinational logic circuitry.

Analyze, design, construct, and debug digital finite state machine circuitry.



CORE SKILLS TO UNLOCK:


Logic Gates: Construct circuits for AND, OR, NOT, XOR operations.

Truth Tables: Describe circuit functions using I/O tables.

Boolean Algebra: Perform math with binary logic circuits.

Karnaugh Maps: Graphically simplify equations for efficiency.

Number Systems: Master binary and other non-decimal systems.

Programmable Logic: Realize circuits using programmable elements.

Memory: Store logic states in latches and flip-flops.

Finite State Machines (FSM): Combine memory & logic for complex functions.

Microprocessors: Understand the inner workings of a CPU.






COURSE MODULES (LEVELS)

This course is divided into 8 modules. Complete them all to win!



MODULE 1: FUNDAMENTALS & LOGIC GATES

Analog vs. Digital: Analog is continuous; Digital is discrete (0s and 1s). We focus on Digital.

Binary Digits (Bits): The fundamental unit of information. Logic 0 (Low, False, ~0V) and Logic 1 (High, True, ~5V).

BASIC LOGIC GATES



GATE
SYMBOL
BOOLEAN EQ
TRUTH TABLE (2-Input)





AND

D-SHAPE

Y = A * B

0*0=0, 0*1=0, 1*0=0, 1*1=1




OR

CURVED

Y = A + B

0+0=0, 0+1=1, 1+0=1, 1+1=1




NOT

TRIANGLE

Y = A'

0'=1, 1'=0




NAND

AND+BUBBLE

Y = (A * B)'

0*0'=1, 0*1'=1, 1*0'=1, 1*1'=0




NOR

OR+BUBBLE

Y = (A + B)'

0+0'=1, 0+1'=0, 1+0'=0, 1+1'=0




XOR

CURVED+LINE

Y = A ⊕ B

0⊕0=0, 0⊕1=1, 1⊕0=1, 1⊕1=0









MODULE 2: NUMBER SYSTEMS & ARITHMETIC


Decimal (Base-10): 0-9. Our everyday system.

Binary (Base-2): 0, 1. The language of computers.

Hexadecimal (Base-16): 0-9, A-F. Compact representation of binary.


Binary Arithmetic

Addition: 0+0=0, 0+1=1, 1+0=1, 1+1=10 (0 carry 1).

2's Complement: Used for representing signed numbers.…

EEE120: Digital Design Fundamentals - 8-Bit Guide

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        <p>WELCOME TO</p>
        <h1 style="font-size: 3rem; color: var(--heading-color);">EEE120</h1>
        <p>DIGITAL DESIGN FUNDAMENTALS</p>
    </div>
    <button id="start-btn">INSERT COIN TO START</button>
</div>

<div id="main-content" style="display: none;">
    <nav>
        <ul>
            <li><a href="#overview">OVERVIEW</a></li>
            <li><a href="#modules">MODULES</a></li>
            <li><a href="#labs">LABS</a></li>
            <li><a href="#examples">EXAMPLES</a></li>
            <li><a href="#faqs">FAQs</a></li>
        </ul>
    </nav>

    <header style="text-align: center; padding: 2rem 0;">
        <h1>EEE120: LEVEL 1 - DIGITAL LOGIC</h1>
        <p style="font-family: 'Press Start 2P', cursive; color: var(--accent-color);">ASU COURSE ASSISTANT SYSTEM ONLINE<span class="blink">_</span></p>
    </header>

    <div class="container">
        <section id="overview" class="pixel-box">
            <h2>MISSION OVERVIEW</h2>
            <p>Welcome, Player! Your objective is to master the fundamentals of digital design. We will ACE this class together.</p>
            
            <h3>OBJECTIVES:</h3>
            <ul>
                <li>Analyze, design, construct, and debug digital combinational logic circuitry.</li>
                <li>Analyze, design, construct, and debug digital finite state machine circuitry.</li>
            </ul>

            <h3>CORE SKILLS TO UNLOCK:</h3>
            <ul>
                <li><strong>Logic Gates:</strong> Construct circuits for AND, OR, NOT, XOR operations.</li>
                <li><strong>Truth Tables:</strong> Describe circuit functions using I/O tables.</li>
                <li><strong>Boolean Algebra:</strong> Perform math with binary logic circuits.</li>
                <li><strong>Karnaugh Maps:</strong> Graphically simplify equations for efficiency.</li>
                <li><strong>Number Systems:</strong> Master binary and other non-decimal systems.</li>
                <li><strong>Programmable Logic:</strong> Realize circuits using programmable elements.</li>
                <li><strong>Memory:</strong> Store logic states in latches and flip-flops.</li>
                <li><strong>Finite State Machines (FSM):</strong> Combine memory & logic for complex functions.</li>
                <li><strong>Microprocessors:</strong> Understand the inner workings of a CPU.</li>
            </ul>
        </section>

        <section id="modules">
            <h2>COURSE MODULES (LEVELS)</h2>
            <p>This course is divided into 8 modules. Complete them all to win!</p>

            <div class="pixel-box" id="mod1">
                <h3>MODULE 1: FUNDAMENTALS & LOGIC GATES</h3>
                <p><strong>Analog vs. Digital:</strong> Analog is continuous; Digital is discrete (0s and 1s). We focus on Digital.</p>
                <p><strong>Binary Digits (Bits):</strong> The fundamental unit of information. Logic 0 (Low, False, ~0V) and Logic 1 (High, True, ~5V).</p>
                <h4>BASIC LOGIC GATES</h4>
                <table>
                    <thead>
                        <tr><th>GATE</th><th>SYMBOL</th><th>BOOLEAN EQ</th><th>TRUTH TABLE (2-Input)</th></tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>AND</td>
                            <td style="font-family: 'Press Start 2P';">D-SHAPE</td>
                            <td>Y = A * B</td>
                            <td>0*0=0, 0*1=0, 1*0=0, 1*1=1</td>
                        </tr>
                        <tr>
                            <td>OR</td>
                            <td style="font-family: 'Press Start 2P';">CURVED</td>
                            <td>Y = A + B</td>
                            <td>0+0=0, 0+1=1, 1+0=1, 1+1=1</td>
                        </tr>
                        <tr>
                            <td>NOT</td>
                            <td style="font-family: 'Press Start 2P';">TRIANGLE</td>
                            <td>Y = A'</td>
                            <td>0'=1, 1'=0</td>
                        </tr>
                        <tr>
                            <td>NAND</td>
                            <td style="font-family: 'Press Start 2P';">AND+BUBBLE</td>
                            <td>Y = (A * B)'</td>
                            <td>0*0'=1, 0*1'=1, 1*0'=1, 1*1'=0</td>
                        </tr>
                        <tr>
                            <td>NOR</td>
                            <td style="font-family: 'Press Start 2P';">OR+BUBBLE</td>
                            <td>Y = (A + B)'</td>
                            <td>0+0'=1, 0+1'=0, 1+0'=0, 1+1'=0</td>
                        </tr>
                         <tr>
                            <td>XOR</td>
                            <td style="font-family: 'Press Start 2P';">CURVED+LINE</td>
                            <td>Y = A ⊕ B</td>
                            <td>0⊕0=0, 0⊕1=1, 1⊕0=1, 1⊕1=0</td>
                        </tr>
                    </tbody>
                </table>
            </div>

            <div class="pixel-box" id="mod2">
                <h3>MODULE 2: NUMBER SYSTEMS & ARITHMETIC</h3>
                <ul>
                    <li><strong>Decimal (Base-10):</strong> 0-9. Our everyday system.</li>
                    <li><strong>Binary (Base-2):</strong> 0, 1. The language of computers.</li>
                    <li><strong>Hexadecimal (Base-16):</strong> 0-9, A-F. Compact representation of binary.</li>
                </ul>
                <h4>Binary Arithmetic</h4>
                <p><strong>Addition:</strong> 0+0=0, 0+1=1, 1+0=1, 1+1=10 (0 carry 1).</p>
                <p><strong>2's Complement:</strong> Used for representing signed numbers. To find 2's complement: Invert all bits and add 1.</p>
                <p>Example: +5 is `0101`. -5 is `1010` (invert) + `1` = `1011`.</p>
            </div>

            <div class="pixel-box" id="mod3">
                <h3>MODULE 3: BOOLEAN ALGEBRA & K-MAPS</h3>
                <p>Use Boolean theorems to simplify logic expressions, reducing gate count.</p>
                <h4>Karnaugh Maps (K-Maps)</h4>
                <p>A graphical method to simplify Boolean equations. Group adjacent 1s in powers of 2 (1, 2, 4, 8...).</p>
                <p><strong>Forms:</strong></p>
                <ul>
                    <li><strong>Sum of Products (SOP):</strong> Group 1s. Result is ORed product terms (e.g., Y = AB + C'D).</li>
                    <li><strong>Product of Sums (POS):</strong> Group 0s. Result is ANDed sum terms (e.g., Y = (A+B)(C'+D')).</li>
                </ul>
            </div>

            <div class="pixel-box" id="mod4">
                <h3>MODULE 4: COMBINATIONAL LOGIC</h3>
                <p>Logic circuits where the output depends only on current inputs.</p>
                <ul>
                    <li><strong>Decoder:</strong> Converts binary code to a single active output (e.g., 2-to-4 decoder).</li>
                    <li><strong>Encoder:</strong> Converts a single active input to a binary code (reverse of decoder).</li>
                    <li><strong>Multiplexer (MUX):</strong> A "data selector". Selects one of many inputs to the output based on select lines.</li>
                    <li><strong>Demultiplexer (DeMUX):</strong> A "data distributor". Takes one input and routes it to one of many outputs.</li>
                </ul>
            </div>

            <div class="pixel-box" id="mod5">
                <h3>MODULE 5: SEQUENTIAL LOGIC</h3>
                <p>Logic circuits with memory. Output depends on current inputs AND past outputs (state).</p>
                <ul>
                    <li><strong>Latch:</strong> Basic memory element, level-sensitive (e.g., SR Latch, D Latch).</li>
                    <li><strong>Flip-Flop:</strong> Edge-triggered memory element. Changes state on clock edge (e.g., D-FF, JK-FF, T-FF).</li>
                    <li><strong>Register:</strong> A group of flip-flops used to store multi-bit data.</li>
                    <li><strong>Counter:</strong> A register that cycles through a sequence of states (e.g., binary counter).</li>
                </ul>
            </div>

            <div class="pixel-box" id="mod6">
                <h3>MODULE 6: FINITE STATE MACHINES (FSM)</h3>
                <p>A model of computation consisting of a set of states, a start state, and transitions between states based on inputs.</p>
                <ul>
                    <li><strong>Moore Machine:</strong> Outputs depend ONLY on the current state.</li>
                    <li><strong>Mealy Machine:</strong> Outputs depend on the current state AND current inputs.</li>
                </ul>
                <p><strong>Design Process:</strong> State Diagram -> State Table -> State Assignment -> K-Maps -> Circuit Implementation.</p>
            </div>
            
            <div class="pixel-box" id="mod78">
                <h3>MODULE 7 & 8: MICROPROCESSOR & REVIEW</h3>
                <p><strong>M7:</strong> Design a basic microprocessor (CPU) by combining an ALU, registers, and a control unit (FSM).</p>
                <p><strong>M8:</strong> Final Exam Review.</p>
            </div>
        </section>

        <section id="labs" class="pixel-box">
            <h2>LABORATORY MISSIONS</h2>
            <p>Your goal is to build and simulate a 4-bit CPU using the "Digital" software.</p>
            <p style="color: var(--accent-color);"><strong>RULES:</strong> Individual reports required. No copying. Submit zip of design + PDF report on Canvas.</p>

            <h3>MISSION LIST:</h3>
            <ol>
                <li><strong>Lab 0: Simulator Tutorial.</strong> Learn the tools.</li>
                <li><strong>Lab 1: Adders.</strong> Build Half Adder, Full Adder, and 4-bit Adder.</li>
                <li><strong>Lab 2: MUX, ALU, Display.</strong> Build a Multiplexer, Arithmetic Logic Unit, and 7-Segment decoder.</li>
                <li><strong>Lab 3: The Brainless Microprocessor.</strong> Combine ALU and registers.</li>
                <li><strong>Lab 4: The Complete Microprocessor.</strong> Add control logic and memory to execute instructions.</li>
                <li><strong>Capstone Project:</strong> Design your own FSM based on requirements.</li>
            </ol>

            <h4 style="margin-top: 2rem;">LAB EXAMPLE: ALU (From Lab 2/3)</h4>
            <p>An ALU (Arithmetic Logic Unit) performs math and logic operations. A MUX is used to select the operation result.</p>
            <div style="border: 2px solid var(--secondary-accent); padding: 10px; text-align: center;">
                <p style="font-family: 'Press Start 2P';">[IMAGE: BLOCK DIAGRAM OF AN ALU WITH A MUX SELECTING OUTPUTS]</p>
                <p>Inputs A, B -> [AND, OR, ADDER, SUBTRACTOR] -> MUX -> Output Y</p>
            </div>
             <h4 style="margin-top: 2rem;">LAB EXAMPLE: COMPLETE CPU (From Lab 4)</h4>
            <p>The final CPU combines the ALU, Register File, Program Counter, Instruction Memory, and a Control Unit (FSM) to fetch, decode, and execute instructions.</p>
        </section>

        <section id="examples" class="pixel-box">
            <h2>CIRCUIT ANALYSIS EXAMPLE</h2>
            <p>Let's analyze a circuit to find its output waveform.</p>
            <h3>Problem:</h3>
            <p><strong>Circuit:</strong> <code>X = A + B</code> (OR gate), then <code>Z = C ⊕ X</code> (XOR gate). Final: <code>Z = C ⊕ (A + B)</code>.</p>
            
            <h3>Step-by-Step Solution:</h3>
            <table>
                <thead>
                    <tr>
                        <th>TIME INTERVAL</th><th>INPUT A</th><th>INPUT B</th><th>INPUT C</th><th>X = A + B</th><th>Z = C ⊕ X</th>
                    </tr>
                </thead>
                <tbody>
                    <tr><td>1</td><td>1</td><td>0</td><td>0</td><td><strong>1</strong></td><td><strong>1</strong> (0⊕1)</td></tr>
                    <tr><td>2</td><td>0</td><td>0</td><td>0</td><td><strong>0</strong></td><td><strong>0</strong> (0⊕0)</td></tr>
                    <tr><td>3</td><td>0</td><td>1</td><td>1</td><td><strong>1</strong></td><td><strong>0</strong> (1⊕1)</td></tr>
                    <tr><td>4</td><td>1</td><td>1</td><td>1</td><td><strong>1</strong></td><td><strong>0</strong> (1⊕1)</td></tr>
                    <tr><td>5</td><td>1</td><td>0</td><td>0</td><td><strong>1</strong></td><td><strong>1</strong> (0⊕1)</td></tr>
                    <tr><td>6</td><td>0</td><td>0</td><td>0</td><td><strong>0</strong></td><td><strong>0</strong> (0⊕0)</td></tr>
                </tbody>
            </table>
            <p><strong>Final Output Waveform Z:</strong> 1, 0, 0, 0, 1, 0</p>
        </section>

        <section id="faqs" class="pixel-box">
            <h2>FREQUENTLY ASKED QUESTIONS</h2>
            <ul>
                <li>
                    <strong>Q: Is this course hard?</strong><br>
                    A: It requires consistent effort. Don't fall behind! The concepts build on each other.
                </li>
                 <li>
                    <strong>Q: Do I need to know programming?</strong><br>
                    A: No prior knowledge is assumed, but it helps for later modules (microprocessors).
                </li>
                <li>
                    <strong>Q: What software do we use for labs?</strong><br>
                    A: You will use a digital logic simulation software called "Digital".
                </li>
                 <li>
                    <strong>Q: Are labs individual or group work?</strong><br>
                    A: All labs and the Capstone Project are INDIVIDUAL assignments. You can discuss concepts, but your submission must be your own work.
                </li>
                <li>
                    <strong>Q: What's the most important concept?</strong><br>
                    A: Boolean algebra and understanding how state machines work are crucial.
                </li>
            </ul>
        </section>
    </div>

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        <p>© 2023 EEE120 Assistant | ASU</p>
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